- location Tampere

We are looking for an FPGA designer to join our smart camera development.

Your responsibilities include:

  • Implementing image processing algorithms and sensor interface logic in VHDL for FPGA chips.
  • Debugging the image processing path of the smart camera.
  • Working closely with our SW and HW teams in testing of the smart cameras.

We expect from the applicant:

  • Experience of VHDL design.
  • Knowledge of image processing and/or machine vision algorithms.
  • Experience of Linux HW driver implementation is a plus
  • Relevant education (e.g. MSc from technical university)
  • Team working skills.

We offer:

  • Possibility to work on the state-of-the-art smart camera technology
  • Small and enthusiastic R&D team supporting your work.


Markku Selin, tel. 050 557 2244

Please send your application and CV with your salary request by 31 October, 2019 via our web site form below.


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One file only.
100 MB limit.
Allowed types: txt rtf pdf doc docx odt.

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